embedded
runtime_error
ai_generated
true
SysTick:中断在翻转周期内未得到服务,时间基准损坏
SysTick: interrupt not serviced within rollover period, time base corrupted
ID: embedded/arm-systick-rollover-missed
85%修复率
88%置信度
1证据数
2024-03-12首次发现
版本兼容性
| 版本 | 状态 | 引入 | 弃用 | 备注 |
|---|---|---|---|---|
| FreeRTOS v10.6.0 | active | — | — | — |
| ARM Cortex-M4 r0p1 | active | — | — | — |
| STM32CubeH7 v1.11.0 | active | — | — | — |
根因分析
SysTick中断被更高优先级的中断服务程序屏蔽或延迟,导致24位计数器未执行处理程序就翻转,损坏了RTOS滴答计数。
English
SysTick interrupt was masked or delayed by higher-priority ISR, causing the 24-bit counter to wrap without handler execution, corrupting RTOS tick count.
官方文档
https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-timer--systick解决方案
-
Ensure SysTick interrupt priority is lower than time-critical ISRs but never masked for longer than 1 SysTick period. In FreeRTOS, set configMAX_SYSCALL_INTERRUPT_PRIORITY to include SysTick and check that no ISR runs for > 1 ms (assuming 1 kHz tick).
-
Add a guard to detect missed tick and manually increment RTOS tick count. Implement a high-priority timer that checks if SysTick counter wrapped without ISR.
-
Reduce interrupt latency by splitting long ISRs into deferred tasks (e.g., using FreeRTOS task notifications or semaphores).
无效尝试
常见但无效的做法:
-
Increase SysTick interrupt priority to 0 (highest)
60% 失败
Setting SysTick to highest priority may break critical timing in other interrupts and does not address the root cause of long ISR masking.
-
Disable all other interrupts to ensure SysTick runs
70% 失败
Disabling interrupts globally defeats the purpose of RTOS and can cause watchdog resets or data loss.
-
Increase SysTick reload value to extend rollover period
90% 失败
SysTick reload is fixed at 24 bits (max 16,777,215 cycles); increasing it is impossible without changing clock source.