# DMA: transfer alignment error, source buffer not aligned to 4-byte boundary

- **ID:** `embedded/dma-transfer-alignment-error`
- **Domain:** embedded
- **Category:** config_error
- **Error Code:** `0x40020010`
- **Verification:** ai_generated
- **Fix Rate:** 87%

## Root Cause

DMA controller requires source address to be aligned to transfer size (e.g., 4 bytes for word transfer), but input buffer is misaligned due to compiler packing or stack allocation.

## Version Compatibility

| Version | Status | Introduced | Deprecated |
|---------|--------|------------|------------|
| STM32F767 HAL 1.16.0 | active | — | — |
| ARM GCC 12.2.1 | active | — | — |

## Workarounds

1. **Allocate source buffer with alignment attribute: uint8_t buffer[256] __attribute__((aligned(4)));** (90% success)
   ```
   Allocate source buffer with alignment attribute: uint8_t buffer[256] __attribute__((aligned(4)));
   ```
2. **Use memalign or posix_memalign for heap allocation: uint8_t *buf = memalign(4, 256);** (85% success)
   ```
   Use memalign or posix_memalign for heap allocation: uint8_t *buf = memalign(4, 256);
   ```

## Dead Ends

- **** — Adding __attribute__((aligned(4))) to variable declaration does not fix dynamic allocations; heap buffers may still be misaligned. (70% fail)
- **** — Changing DMA transfer size to byte mode works but reduces performance and may cause data corruption if hardware expects word alignment. (80% fail)