# 以太网：MAC FIFO下溢，队列3传输停滞

- **ID:** `embedded/eth-mac-fifo-underflow`
- **领域:** embedded
- **类别:** network_error
- **验证级别:** ai_generated
- **修复率:** 76%

## 根因

以太网MAC发送FIFO在数据包完全发送前变空，原因是DMA带宽不足或低优先级队列调度。

## 版本兼容性

| 版本 | 状态 | 引入 | 弃用 |
|------|------|------|------|
| STM32Cube_FW_H7_V1.11.0 | active | — | — |
| LWIP 2.1.3 | active | — | — |
| FreeRTOSv202212.01 | active | — | — |
| IAR EWARM 9.50.1 | active | — | — |

## 解决方案

1. ```
   Increase DMA burst length for ETH TX: set ETH_DMABMR->FB = 0x1 (fixed burst) and ETH_DMABMR->PBL = 0x20 (32-beat burst) in HAL_ETH_Init().
   ```
2. ```
   Prioritize ETH DMA channel over other DMA channels using NVIC priority and DMA stream priority (low/high) in CubeMX.
   ```
3. ```
   Enable ETH TX FIFO threshold programming: set ETH_MACFCR->TFE = 1 and configure ETH_MACFCR->TFT to 0x10 (16 bytes threshold) to trigger DMA earlier.
   ```

## 无效尝试

- **Increasing Ethernet buffer size in lwIPopts.h (e.g., PBUF_POOL_SIZE from 16 to 32)** — Larger buffers increase latency but do not solve MAC FIFO underflow caused by DMA starvation. (85% 失败率)
- **Disabling interrupt coalescing in ETH DMA** — More interrupts can increase CPU load and worsen DMA bandwidth contention. (75% 失败率)
- **Reducing TCP window size to 1** — Severely limits throughput and does not address the underlying FIFO drain issue. (90% 失败率)