SDIO_STA_CCRCFAIL embedded protocol_error ai_generated true

SDIO: CRC error on command 17, response timeout

ID: embedded/sdio-crc-error

Also available as: JSON · Markdown · 中文
78%Fix Rate
82%Confidence
1Evidence
2024-01-20First Seen

Version Compatibility

VersionStatusIntroducedDeprecatedNotes
STM32Cube_FW_L4 v1.18.0 active — — —
SDIO v2.0 active — — —
GCC ARM Embedded 10.3.1 active — — —

Root Cause

CRC mismatch between SD card and host during command or data transfer, often due to electrical noise, clock timing issues, or card initialization failure.

generic

中文

SD 卡与主机之间在命令或数据传输期间 CRC 不匹配，通常由于电气噪声、时钟时序问题或卡初始化失败。

Official Documentation

https://www.st.com/resource/en/application_note/an3991-sdio-hardware-and-software-design-guidelines-for-stm32-microcontrollers-stmicroelectronics.pdf

Workarounds

  1. 85% success Reduce SDIO clock divider to lower frequency: set SDIO_CLKCR_CLKDIV to 2 (e.g., for 48 MHz clock, output 12 MHz) and ensure clock polarity matches SD card spec. 
    Reduce SDIO clock divider to lower frequency: set SDIO_CLKCR_CLKDIV to 2 (e.g., for 48 MHz clock, output 12 MHz) and ensure clock polarity matches SD card spec.
  2. 75% success Enable internal pull-ups on SDIO data lines and add external 10-100 pF capacitors to ground on each line to filter noise. 
    Enable internal pull-ups on SDIO data lines and add external 10-100 pF capacitors to ground on each line to filter noise.
  3. 80% success Reinitialize the SD card with a slower clock and retry command 17: use HAL_SD_Init() with SDIO_INIT_CLK_DIV of 0x76, then switch to high-speed after successful read. 
    Reinitialize the SD card with a slower clock and retry command 17: use HAL_SD_Init() with SDIO_INIT_CLK_DIV of 0x76, then switch to high-speed after successful read.

中文步骤

  1. 降低 SDIO 时钟分频器以降低频率：设置 SDIO_CLKCR_CLKDIV 为 2（例如，48 MHz 时钟输出 12 MHz），并确保时钟极性符合 SD 卡规格。
  2. 在 SDIO 数据线上启用内部上拉，并在每条线上添加外部 10-100 pF 电容到地，以过滤噪声。
  3. 使用较慢时钟重新初始化 SD 卡并重试命令 17：使用 SDIO_INIT_CLK_DIV 为 0x76 的 HAL_SD_Init()，成功读取后切换到高速模式。

Dead Ends

Common approaches that don't work:

  1. Increase SDIO clock frequency to improve throughput 90% fail

    Higher clock frequency worsens timing margins and increases CRC errors.

  2. Replace SD card with a different brand without changing settings 70% fail

    Different cards have varying timing requirements; the issue may persist without proper clock adjustment.

  3. Disable CRC checking in SDIO peripheral 95% fail

    CRC is mandatory for reliable data transfer; disabling it can cause silent data corruption.