# SPI: chip select glitch detected on GPIO line, causing false slave selection

- **ID:** `embedded/spi-cs-glitch-on-gpio`
- **Domain:** embedded
- **Category:** hardware_error
- **Verification:** ai_generated
- **Fix Rate:** 90%

## Root Cause

The chip select (CS) GPIO line is driven by software or has insufficient drive strength, causing a brief low pulse (glitch) during GPIO toggling, which falsely selects or deselects the SPI slave.

## Workarounds

1. **Enable the SPI peripheral's hardware NSS (automatic chip select) if available. Example on STM32: hspi.Init.NSS = SPI_NSS_HARD_OUTPUT; then configure the CS pin as SPI_NSS alternate function.** (95% success)
   ```
   Enable the SPI peripheral's hardware NSS (automatic chip select) if available. Example on STM32: hspi.Init.NSS = SPI_NSS_HARD_OUTPUT; then configure the CS pin as SPI_NSS alternate function.
   ```
2. **Add a 10kΩ pull-up resistor on the CS line to hold it high during GPIO transitions, and set the GPIO output to open-drain with a weak drive.** (85% success)
   ```
   Add a 10kΩ pull-up resistor on the CS line to hold it high during GPIO transitions, and set the GPIO output to open-drain with a weak drive.
   ```

## Dead Ends

- **** — Adding a delay before toggling CS does not eliminate the glitch; the glitch occurs during the transition itself. (70% fail)
- **** — Changing the GPIO output speed to high increases the glitch amplitude due to faster slew rate, making the problem worse. (60% fail)