embedded runtime_error ai_generated true

SPI：DMA FIFO溢出，通道2数据丢失

SPI: DMA FIFO overrun, data lost on channel 2

ID: embedded/spi-dma-fifo-overrun

其他格式: JSON · Markdown 中文 · English
78%修复率
85%置信度
1证据数
2024-03-15首次发现

版本兼容性

版本状态引入弃用备注
STM32Cube_FW_H7_V1.11.0 active — — —
FreeRTOSv202212.01 active — — —
ARM GCC 12.2.1 active — — —

根因分析

SPI DMA传输速率超过FIFO排空速度，导致接收FIFO中数据丢失。

English

SPI DMA transfer rate exceeds FIFO drain speed, causing data loss in the RX FIFO.

generic

官方文档

https://www.st.com/resource/en/application_note/dm00204416-spi-dma-communication-on-stm32-microcontrollers-stmicroelectronics.pdf

解决方案

  1. Reduce SPI baud rate prescaler (e.g., from 2 to 4) in MX_SPI1_Init(): hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; then regenerate code.
  2. Enable SPI RX FIFO threshold interrupt and use DMA with circular mode: set hspi1.Init.FifoThreshold = SPI_FIFO_THRESHOLD_08DATA; and configure DMA in circular mode.
  3. Use DMA flow controller with burst transfers: configure DMA2_Stream0 with DMA_SxCR_PBURST and DMA_SxCR_MBURST enabled.

无效尝试

常见但无效的做法:

  1. Increasing SPI clock speed to match DMA rate 90% 失败

    Higher clock speed worsens the FIFO overflow issue as data arrives faster.

  2. Disabling DMA and using polling mode 70% 失败

    Polling mode reduces throughput and may cause CPU starvation in real-time systems.

  3. Adding software delay loops in the DMA ISR 80% 失败

    Delays in ISR increase latency and can cause other interrupts to be missed.