embedded
config_error
ai_generated
true
SPI DMA:缓冲区地址0x2000FF01未对齐,数据传输中止
SPI DMA: misaligned buffer address 0x2000FF01, data transfer aborted
ID: embedded/spi-dma-misaligned-buffer
90%修复率
85%置信度
1证据数
2024-05-20首次发现
版本兼容性
| 版本 | 状态 | 引入 | 弃用 | 备注 |
|---|---|---|---|---|
| STM32H743 | active | — | — | — |
| ARM Cortex-M7 r1p1 | active | — | — | — |
| HAL_DMA v2.2.0 | active | — | — | — |
根因分析
DMA缓冲区地址未对齐到DMA控制器要求的边界(通常为4或16字节),导致传输错误或总线故障。
English
DMA buffer address is not aligned to the DMA controller's required boundary (typically 4 or 16 bytes), causing a transfer error or bus fault.
官方文档
https://www.st.com/resource/en/reference_manual/rm0390-stm32h745x5-and-stm32h755x5-armbased-32bit-mcus-stmicroelectronics.pdf解决方案
-
Allocate DMA buffers using aligned memory macros. For GCC, use __attribute__((aligned(16))). For CMSIS, use DMA_BUFFER_ALIGNED.
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Use dynamic memory allocation from a dedicated aligned heap, e.g., pvPortMallocAligned from FreeRTOS or memalign.
无效尝试
常见但无效的做法:
-
Use memcpy to copy data to a temporary buffer before DMA transfer
50% 失败
Adds latency and memory overhead; if the temporary buffer is also not aligned due to compiler padding, the error persists.
-
Disable DMA and use polling SPI instead
80% 失败
Reduces throughput significantly and may cause CPU starvation in high-speed applications.
-
Change DMA FIFO threshold to bypass alignment check
95% 失败
FIFO threshold does not affect address alignment requirements; misalignment still causes AHB bus error.