# SPI：SSI FIFO下溢在通道0上，数据传输中止

- **ID:** `embedded/spi-ssi-fifo-underrun`
- **领域:** embedded
- **类别:** runtime_error
- **错误码:** `0x800F0001`
- **验证级别:** ai_generated
- **修复率:** 87%

## 根因

SPI控制器的发送FIFO在DMA或CPU写入新数据之前已清空，导致下溢并因缺少数据而中止帧传输。

## 版本兼容性

| 版本 | 状态 | 引入 | 弃用 |
|------|------|------|------|
| Synopsys DW_apb_ssi v4.01a | active | — | — |
| STM32H743 HAL 1.11.0 | active | — | — |
| Linux kernel 5.15.0 | active | — | — |

## 解决方案

1. ```
   Enable SPI FIFO underrun interrupt and in ISR, write dummy data to keep transmission alive: HAL_SPI_Abort(&hspi); then restart with HAL_SPI_Transmit_DMA(&hspi, pData, Size);
   ```
2. ```
   Increase DMA burst size to 4 or 8 words to ensure FIFO stays filled; set DMA control register to burst size 4.
   ```

## 无效尝试

- **** — Increasing SPI clock speed worsens underrun because it accelerates FIFO drain, making time-to-fill smaller. (95% 失败率)
- **** — Doubling FIFO depth via hardware configuration does not help if CPU/DMA latency remains high; underrun occurs at same rate. (80% 失败率)