embedded runtime_error ai_generated true

Timer: output compare event missed, counter value 0x1234 exceeds compare value

ID: embedded/timer-output-compare-missed-event

Also available as: JSON · Markdown · 中文
82%Fix Rate
83%Confidence
1Evidence
2024-06-10First Seen

Version Compatibility

VersionStatusIntroducedDeprecatedNotes
STM32Cube_FW_L4 V1.18.0 active — — —
FreeRTOS V10.5.0 active — — —

Root Cause

Output compare event missed because interrupt latency or software delay prevented timely update of compare register.

generic

中文

输出比较事件因中断延迟或软件延迟导致比较寄存器未及时更新而丢失。

Official Documentation

https://www.st.com/resource/en/reference_manual/dm00083598.pdf

Workarounds

  1. 90% success Use one-pulse mode (OPM) to automatically stop timer after compare match, avoiding re-arm issues: `TIMx->CR1 |= TIM_CR1_OPM;` 
    Use one-pulse mode (OPM) to automatically stop timer after compare match, avoiding re-arm issues: `TIMx->CR1 |= TIM_CR1_OPM;`
  2. 85% success Shorten interrupt service routine by moving heavy processing to task context, e.g., use semaphore to signal task. 
    Shorten interrupt service routine by moving heavy processing to task context, e.g., use semaphore to signal task.
  3. 80% success Preload compare register with shadow register enabled: `TIMx->CR2 |= TIM_CR2_CCDS;` to update at next update event. 
    Preload compare register with shadow register enabled: `TIMx->CR2 |= TIM_CR2_CCDS;` to update at next update event.

中文步骤

  1. 使用单脉冲模式（OPM）在比较匹配后自动停止定时器，避免重新使能问题：`TIMx->CR1 |= TIM_CR1_OPM;`
  2. 缩短中断服务程序，将重处理移至任务上下文，例如使用信号量通知任务。
  3. 使能影子寄存器预加载比较值：`TIMx->CR2 |= TIM_CR2_CCDS;` 在下一次更新事件时更新。

Dead Ends

Common approaches that don't work:

  1. 70% fail

    Increasing timer prescaler reduces resolution but does not fix missed event due to long ISR.

  2. 60% fail

    Adding more priority levels to NVIC does not address software delay in ISR.