embedded runtime_error ai_generated true

SysTick: interrupt not serviced within rollover period, time base corrupted

ID: embedded/arm-systick-rollover-missed

Also available as: JSON · Markdown · 中文
85%Fix Rate
88%Confidence
1Evidence
2024-03-12First Seen

Version Compatibility

VersionStatusIntroducedDeprecatedNotes
FreeRTOS v10.6.0 active — — —
ARM Cortex-M4 r0p1 active — — —
STM32CubeH7 v1.11.0 active — — —

Root Cause

SysTick interrupt was masked or delayed by higher-priority ISR, causing the 24-bit counter to wrap without handler execution, corrupting RTOS tick count.

generic

中文

SysTick中断被更高优先级的中断服务程序屏蔽或延迟，导致24位计数器未执行处理程序就翻转，损坏了RTOS滴答计数。

Official Documentation

https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-timer--systick

Workarounds

  1. 80% success Ensure SysTick interrupt priority is lower than time-critical ISRs but never masked for longer than 1 SysTick period. In FreeRTOS, set configMAX_SYSCALL_INTERRUPT_PRIORITY to include SysTick and check that no ISR runs for > 1 ms (assuming 1 kHz tick). 
    Ensure SysTick interrupt priority is lower than time-critical ISRs but never masked for longer than 1 SysTick period. In FreeRTOS, set configMAX_SYSCALL_INTERRUPT_PRIORITY to include SysTick and check that no ISR runs for > 1 ms (assuming 1 kHz tick).
  2. 75% success Add a guard to detect missed tick and manually increment RTOS tick count. Implement a high-priority timer that checks if SysTick counter wrapped without ISR. 
    Add a guard to detect missed tick and manually increment RTOS tick count. Implement a high-priority timer that checks if SysTick counter wrapped without ISR.
  3. 90% success Reduce interrupt latency by splitting long ISRs into deferred tasks (e.g., using FreeRTOS task notifications or semaphores). 
    Reduce interrupt latency by splitting long ISRs into deferred tasks (e.g., using FreeRTOS task notifications or semaphores).

中文步骤

  1. Ensure SysTick interrupt priority is lower than time-critical ISRs but never masked for longer than 1 SysTick period. In FreeRTOS, set configMAX_SYSCALL_INTERRUPT_PRIORITY to include SysTick and check that no ISR runs for > 1 ms (assuming 1 kHz tick).
  2. Add a guard to detect missed tick and manually increment RTOS tick count. Implement a high-priority timer that checks if SysTick counter wrapped without ISR.
  3. Reduce interrupt latency by splitting long ISRs into deferred tasks (e.g., using FreeRTOS task notifications or semaphores).

Dead Ends

Common approaches that don't work:

  1. Increase SysTick interrupt priority to 0 (highest) 60% fail

    Setting SysTick to highest priority may break critical timing in other interrupts and does not address the root cause of long ISR masking.

  2. Disable all other interrupts to ensure SysTick runs 70% fail

    Disabling interrupts globally defeats the purpose of RTOS and can cause watchdog resets or data loss.

  3. Increase SysTick reload value to extend rollover period 90% fail

    SysTick reload is fixed at 24 bits (max 16,777,215 cycles); increasing it is impossible without changing clock source.