USART_SR_ORE embedded runtime_error ai_generated true

UART: overrun error on USART1, data lost

ID: embedded/uart-overrun-error

Also available as: JSON · Markdown · 中文
80%Fix Rate
85%Confidence
1Evidence
2023-06-15First Seen

Version Compatibility

VersionStatusIntroducedDeprecatedNotes
STM32Cube_FW_F4 v1.27.0 active — — —
FreeRTOS v10.4.6 active — — —
GCC ARM Embedded 12.2.1 active — — —

Root Cause

UART receive buffer overrun because the CPU failed to read data before the next byte arrived, typically due to high interrupt latency or insufficient DMA buffering.

generic

中文

UART 接收缓冲区溢出，因为 CPU 未能在下一个字节到达前读取数据，通常由于高中断延迟或 DMA 缓冲不足。

Official Documentation

https://www.st.com/resource/en/reference_manual/dm00031020-stm32f405-415-407-417-427-437-429-439-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf

Workarounds

  1. 85% success Enable UART DMA for reception with a circular buffer: configure DMA with peripheral-to-memory transfer, set buffer size to 256 bytes, and use half-transfer/full-transfer interrupts to process data. 
    Enable UART DMA for reception with a circular buffer: configure DMA with peripheral-to-memory transfer, set buffer size to 256 bytes, and use half-transfer/full-transfer interrupts to process data.
  2. 75% success Increase UART FIFO threshold (if hardware supports): set USART_CR3_DMAT to enable DMA, or configure RTO (receive timeout) to flush buffer periodically. 
    Increase UART FIFO threshold (if hardware supports): set USART_CR3_DMAT to enable DMA, or configure RTO (receive timeout) to flush buffer periodically.
  3. 70% success Reduce interrupt priority of other peripherals to ensure UART ISR executes promptly: use NVIC_SetPriority(USART1_IRQn, 0) for highest priority. 
    Reduce interrupt priority of other peripherals to ensure UART ISR executes promptly: use NVIC_SetPriority(USART1_IRQn, 0) for highest priority.

中文步骤

  1. 启用 UART DMA 进行接收并使用环形缓冲区：配置 DMA 为外设到内存传输，设置缓冲区大小为 256 字节，并使用半传输/全传输中断处理数据。
  2. 增加 UART FIFO 阈值（如果硬件支持）：设置 USART_CR3_DMAT 启用 DMA，或配置接收超时（RTO）定期刷新缓冲区。
  3. 降低其他外设的中断优先级，确保 UART ISR 及时执行：使用 NVIC_SetPriority(USART1_IRQn, 0) 设置最高优先级。

Dead Ends

Common approaches that don't work:

  1. Increase UART baud rate to reduce data arrival rate 95% fail

    Higher baud rate increases data rate, worsening the overrun condition.

  2. Disable UART interrupts and poll manually 80% fail

    Polling increases CPU load and may miss data entirely, leading to more overruns.

  3. Add a delay in the UART ISR 90% fail

    Delays in ISR increase interrupt latency, causing more overruns.