embedded config_error ai_generated true

SPI DMA: misaligned buffer address 0x2000FF01, data transfer aborted

ID: embedded/spi-dma-misaligned-buffer

Also available as: JSON · Markdown · 中文
90%Fix Rate
85%Confidence
1Evidence
2024-05-20First Seen

Version Compatibility

VersionStatusIntroducedDeprecatedNotes
STM32H743 active
ARM Cortex-M7 r1p1 active
HAL_DMA v2.2.0 active

Root Cause

DMA buffer address is not aligned to the DMA controller's required boundary (typically 4 or 16 bytes), causing a transfer error or bus fault.

generic

中文

DMA缓冲区地址未对齐到DMA控制器要求的边界(通常为4或16字节),导致传输错误或总线故障。

Official Documentation

https://www.st.com/resource/en/reference_manual/rm0390-stm32h745x5-and-stm32h755x5-armbased-32bit-mcus-stmicroelectronics.pdf

Workarounds

  1. 95% success Allocate DMA buffers using aligned memory macros. For GCC, use __attribute__((aligned(16))). For CMSIS, use DMA_BUFFER_ALIGNED.
    Allocate DMA buffers using aligned memory macros. For GCC, use __attribute__((aligned(16))). For CMSIS, use DMA_BUFFER_ALIGNED.
  2. 90% success Use dynamic memory allocation from a dedicated aligned heap, e.g., pvPortMallocAligned from FreeRTOS or memalign.
    Use dynamic memory allocation from a dedicated aligned heap, e.g., pvPortMallocAligned from FreeRTOS or memalign.

中文步骤

  1. Allocate DMA buffers using aligned memory macros. For GCC, use __attribute__((aligned(16))). For CMSIS, use DMA_BUFFER_ALIGNED.
  2. Use dynamic memory allocation from a dedicated aligned heap, e.g., pvPortMallocAligned from FreeRTOS or memalign.

Dead Ends

Common approaches that don't work:

  1. Use memcpy to copy data to a temporary buffer before DMA transfer 50% fail

    Adds latency and memory overhead; if the temporary buffer is also not aligned due to compiler padding, the error persists.

  2. Disable DMA and use polling SPI instead 80% fail

    Reduces throughput significantly and may cause CPU starvation in high-speed applications.

  3. Change DMA FIFO threshold to bypass alignment check 95% fail

    FIFO threshold does not affect address alignment requirements; misalignment still causes AHB bus error.